芯片制造——半导体工艺制程实用教程（第六版）（英文版）
| 作者 |
| Peter Van Zant（彼得·范·赞特） Peter Van Zant（彼得·范·赞特） |
| 丛书名 |
| 国外电子与通信教材系列 |
| 出版社 |
| 电子工业出版社 |
| ISBN |
| 9787121243783 |
| 简要 |
| 简介 |
| 内容简介 本书是一本介绍半导体集成电路和器件制造技术的专业书籍，在半导体领域享有很高的声誉。本书的范围包括半导体工艺的每个阶段：从原材料的制备到封装、测试和成品运输，以及传统的和现代的工艺。全书提供了详细的插图和实例，每章包含回顾总结和习题，并辅以丰富的术语表。第六版修订了微芯片制造领域的新进展，讨论了用于图形化、掺杂和薄膜步骤的先进工艺和尖端技术，使隐含在复杂的现代半导体制造材料和工艺中的物理、化学和电子的基础知识更易理解。本书的主要特点是避开了复杂的数学问题介绍工艺技术内容；加入了半导体业界的新成果，可以使读者了解工艺技术发展的趋势。 |
| 目录 |
| Contents 1\tThe Semiconductor Industry\t1 Introduction\t1 Birth of an Industry\t1 The Solid-State Era\t3 Integrated Circuits (ICs)\t4 Process and Product Trends\t5 Moore’s Law\t6 Decreasing Feature Size\t6 Increasing Chip and Wafer Size\t8 Reduction in Defect Density\t9 Increase in Interconnection Levels \t10 The Semiconductor Industry Association Roadmap \t10 Chip Cost \t11 Industry Organization \t11 Stages of Manufacturing \t12 Six Decades of Advances in Microchip Fabrication Processes \t14 The Nano Era \t16 Review Topics \t17 References \t17 2\tProperties of Semiconductor Materials and Chemicals\t19 Introduction \t19 Atomic Structure \t19 The Bohr Atom \t19 The Periodic Table of the Elements \t20 Electrical Conduction \t23 Conductors \t23 Dielectrics and Capacitors \t23 Resistors \t24 Intrinsic Semiconductors \t24 Doped Semiconductors \t25 Electron and Hole Conduction \t26 Carrier Mobility \t28 Semiconductor Production Materials \t29 Germanium and Silicon \t29 Semiconducting Compounds \t29 Silicon Germanium \t31 Engineered Substrates \t31 Ferroelectric Materials \t31 Diamond Semiconductors \t32 Process Chemicals \t32 Molecules, Compounds, and Mixtures \t32 Ions \t33 States of Matter \t34 Solids, Liquids, and Gases \t34 Plasma State \t34 Properties of Matter \t34 Temperature \t34 Density, Specic Gravity, and Vapor Density \t35 Pressure and Vacuum \t36 Acids, Alkalis, and Solvents \t37 Acids and Alkalis \t37 Solvents \t38 Chemical Purity and Cleanliness \t38 Safety Issues \t38 The Material Safety Data Sheet \t39 Review Topics \t39 References \t39 3\tCrystal Growth and Silicon Wafer Preparation \t41 Introduction \t41 Semiconductor Silicon Preparation \t41 Silicon Wafer Preparation Stages \t42 Crystalline Materials \t42 Unit Cells \t43 Poly and Single Crystals \t43 Crystal Orientation \t44 Crystal Growth \t45 Czochralski Method \t45 Liquid-Encapsulated Czochralski \t47 Float Zone \t47 Crystal and Wafer Quality \t49 Point Defects \t49 Dislocations \t50 Growth Defects \t50 Wafer Preparation \t51 End Cropping \t51 Diameter Grinding \t51 Crystal Orientation, Conductivity, and Resistivity Check \t51 Grinding Orientation Indicators \t52 Wafer Slicing \t53 Wafer Marking \t54 Rough Polish \t54 Chemical Mechanical Polishing \t55 Backside Processing \t55 Double-Sided Polishing \t56 Edge Grinding and Polishing \t56 Wafer Evaluation \t56 Oxidation \t57 Packaging \t57 Wafer Types and Uses \t57 Reclaim Wafers \t57 Engineered Wafers (Substrates) \t57 Review Topics \t58 References \t58 4\tOverview of Wafer Fabrication and Packaging \t59 Introduction \t59 Goal of Wafer Fabrication \t59 Wafer Terminology \t59 Chip Terminology \t61 Basic Wafer-Fabrication Operations \t63 Layering \t63 Patterning \t64 Circuit Design \t66 Reticle and Masks \t68 Doping \t69 Heat Treatments \t69 Example Fabrication Process \t72 Wafer Sort \t74 Packaging \t75 Summary \t75 Review Topics \t76 References \t76 5\tContamination Control \t77 Introduction \t77 The Problem \t77 Contamination-Caused Problems \t80 Contamination Sources \t81 General Sources \t81 Air \t81 Clean Air Strategies \t82 Cleanroom Workstation Strategy \t83 Tunnel or Bay Concept \t85 Micro- and Mini-Environments \t86 Temperature, Humidity, and Smog \t87 Cleanroom Construction \t88 Construction Materials \t88 Cleanroom Elements \t89 Personnel-Generated Contamination \t93 Process Water \t94 Process Chemicals \t96 Equipment \t99 Cleanroom Materials and Supplies \t99 Cleanroom Maintenance \t100 Wafer-Surface Cleaning \t100 Particulate Removal \t102 Wafer Scrubbers \t102 High-Pressure Water Cleaning \t103 Organic Residues \t103 Inorganic Residues \t103 Chemical-Cleaning Solutions \t104 General Chemical Cleaning \t104 Oxide Layer Removal \t105 Room Temperature and Ozonated Chemistries \t106 Water Rinsing \t108 Drying Techniques \t110 Contamination Detection \t112 Review Topics \t112 References \t113 6\tProductivity and Process Yields \t115 Overview \t115 Yield Measurement Points \t115 Accumulative Wafer-Fabrication Yield \t116 Wafer-Fabrication Yield Limiters \t117 Number of Process Steps \t118 Wafer Breakage and Warping \t118 Process Variation \t119 Mask Defects \t120 Wafer-Sort Yield Factors \t120 Wafer Diameter and Edge Die \t121 Wafer Diameter and Die Size \t122 Wafer Diameter and Crystal Defects \t122 Wafer Diameter and Process Variations \t123 Die Area and Defect Density \t124 Circuit Density and Defect Density \t125 Number of Process Steps \t125 Feature Size and Defect Size \t125 Process Cycle Time \t125 Wafer-Sort Yield Formulas \t125 Assembly and Final Test Yields \t128 Overall Process Yields \t128 Review Topics \t129 References \t130 7\tOxidation \t131 Introduction \t131 Silicon Dioxide Layer Uses \t131 Surface Passivation \t131 Doping Barrier \t132 Surface Dielectric \t132 Device Dielectric (MOS Gates) \t133 Device Oxide Thicknesses \t134 Thermal Oxidation Mechanisms \t134 Influences on the Oxidation Rate\t137 Thermal Oxidation Methods\t140 Horizontal Tube Furnaces\t140 Temperature Control System\t141 Source Cabinet\t143 Vertical Tube Furnaces\t143 Rapid Thermal Processing\t146 High-Pressure Oxidation\t149 Oxidant Sources\t151 Oxidation Processes \t154 Preoxidation Wafer Cleaning \t154 Postoxidation Evaluation\t155 Surface Inspection\t156 Oxide Thickness\t156 Oxide and Furnace Cleanliness \t156 Thermal Nitridation \t156 Review Topics\t157 References\t157 8\tThe Ten-Step Patterning Process—Surface Preparation to Exposure 161 Introduction\t161 Overview of the Photomasking Process \t162 Ten-Step Process\t165 Basic Photoresist Chemistry\t167 Photoresist\t167 Photoresist Performance Factors\t169 Resolution Capability\t169 Adhesion Capability \t170 Process Latitude\t171 Pinholes \t172 Particle and Contamination Levels\t173 Step Coverage\t173 Thermal Flow\t173 Comparison of Positive and Negative Resists\t173 Physical Properties of Photoresists\t175 Solids Content\t175 Viscosity \t175 Surface Tension\t176 Index of Refraction \t176 Storage and Control of Photoresists\t176 Light and Heat Sensitivity\t176 Viscosity Sensitivity\t177 Shelf Life\t177 Cleanliness\t177 Photomasking Processes—Surface Preparation to Exposure\t178 Surface Preparation \t178 Particle Removal\t178 Dehydration Baking \t178 Wafer Priming\t179 Spin Priming\t180 Vapor Priming\t180 Photoresist Application (Spinning)\t181 The Static Dispense Spin Process\t181 Dynamic Dispense\t183 Moving-Arm Dispensing\t183 Manual Spinners\t183 Automatic Spinners \t184 Edge Bead Removal\t185 Backside Coating\t185 Soft Bake \t185 Convection Ovens\t186 Manual Hot Plates\t187 In-Line, Single-Wafer Hot Plates\t187 Moving-Belt Hot Plates\t187 Moving-Belt Infrared Ovens\t188 Microwave Baking\t188 Vacuum Baking\t188 Alignment and Exposure\t189 Alignment and Exposure Systems\t189 Exposure Sources\t191 Alignment Criteria\t191 Aligner Types\t193 Postexposure Bake\t196 Advanced Lithography\t198 Review Topics\t198 References\t198 9\tThe Ten-Step Patterning Process—Developing to Final Inspection 201 Introduction\t201 Development\t201 Positive Resist Development\t201 Negative Resist Development\t203 Wet Development Processes\t203 Dry (or Plasma) Development\t206 Hard Bake \t207 Hard-Bake Methods\t207 Hard-Bake |
有问题微信扫码联系